Application of FPGA in Intelligent Pressure Sensor Systems 6

3.2 Implementation of Data Collection and Control Unit

The data acquisition system (DAS) control unit is the core of the entire system, with its input ports and functions: DAS_STS is used to receive the STS status signal of AD1; DAS-IN (12 bits) is used to receive AD1 parallel 12 bit conversion output; CLK and RST are used as system clock and RESET signals. The output port DAS-RC is connected to the R/C terminal of AD1 to control the startup and reading of the A/D converter; DAS-A is used to control the A1A0 channel gating signal of AD7502; DAS-OUT (with a channel number of 16 bits) is used as the 16 bit output data for the DAS control unit. diode

The finite state machine (FSM) of the DAS control unit has four states, namely St0, St1, St2, and St3. St0 selects the channel, initiates A/D conversion, and enters St1 state; St1 is waiting for the conversion to end. If the conversion ends, enter St2 state, otherwise remain in St1 state; St2 sends out a read data signal and enters the St3 state; St3 is the output conversion data; Select another channel and return to St0 status. The DAS control unit is developed using VHDL language, and the partial code of the program is as follows:diode