Collapse effe5ct of field-effect transistors in power applications 8

This 13.7 ℃ is the temperature rise caused by the collapse, so the designer must first calculate the normal operating junction temperature of this field-effect transistor, and then add the temperature rise due to the collapse effect. The temperature result must be lower than the rated maximum temperature, with some safety margin added to meet the requirements of reliability and trustworthiness.

5. Conclusion

The collapse application problem of field-effect transistor that designers often face hopes to provide better analysis tools for designers through the analysis of the collapse effect mode and the calculation of junction temperature mentioned above.

The degree can be derived from the following equation:

Tj=PDxRθjc+TC----------(1)

Where Tj: Joint surface temperature TC: Shell temperature PD: Overall power loss R θ jc: Thermal resistance conducted from the joint surface to the shell under steady-state conditions

In most applications, switch mode power supply lines use field-effect transistor as switches. Therefore, when a series of pulse switching field-effect transistors are used, their power consumption and changes in junction temperature depend on the peak power and pulse width. The instantaneous thermal resistance at this time can be derived based on the change in time as follows:

Zθjc(t)=r(t)xRθjc----------(2)

Where r (t) represents a parameter of heat dissipation capability. When the pulse width is very short,